OPTIMIZATION OF CONTROL UNIT BASED ON PECULIARITIES OF CPLD

Please use this identifier to cite or link to this item: https://ea.donntu.edu.ua/jspui/handle/123456789/3704

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DC Field	Value	Language
dc.contributor.author	Barkalov, A.A.	-
dc.contributor.author	Zelenyova, I.Y.	-
dc.contributor.author	Kovalyov, S.A.	-
dc.contributor.author	Lavrik, A.S.	-
dc.date.accessioned	2012-01-08T11:57:48Z	-
dc.date.available	2012-01-08T11:57:48Z	-
dc.date.issued	2012-01-08	-
dc.identifier.uri	http://ea.donntu.edu.ua/handle/123456789/3704	-
dc.description.abstract	The method of hardware reduction is proposed oriented on compositional microprogram control units and CPLD chips. The method is based on a wide fan-in of PAL macrocells allowing using more than one source of microinstruction address. Such approach permits to minimize the number of PAL macrocells used for transformation of microinstruction address. Conditions for this method application and example of its application are given.	en_US
dc.language.iso	en	en_US
dc.subject	compositional microprogram control unit	en_US
dc.subject	operational linear chain	en_US
dc.subject	microintruction	en_US
dc.subject	address transformation	en_US
dc.title	OPTIMIZATION OF CONTROL UNIT BASED ON PECULIARITIES OF CPLD	en_US
dc.type	Article	en_US
Appears in Collections:	Наукові публікації кафедри комп'ютерної інженерії

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Donetsk National Technical University