Please use this identifier to cite or link to this item:
https://ea.donntu.edu.ua/jspui/handle/123456789/8693
Title: | Hardware methods to increase of algorithms for distributed logic simulation (annotation) |
Authors: | Ладыженский, Ю.В. Тесленко, Г.А. |
Keywords: | distributed logic simualtion |
Issue Date: | 2007 |
Publisher: | Харьковский национальный университет радиоэлектроники |
Citation: | Ladyzhensky Y.V., Teslenko G.A. Hardware methods to increase of algorithms for distributed logic simulation. //Радиоэлектроника и информатика, 2007, №2, С.86-88 |
Abstract: | Methods for hardware accelerations are discussed. A structural implementation of a combined time synchronization algorithm is offered. A structural diagram of specialized software system is presented to support distributed logic simulation. |
URI: | http://ea.donntu.edu.ua/handle/123456789/8693 |
Appears in Collections: | Публікації у збірниках праць конференцій |
Files in This Item:
File | Description | Size | Format | |
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Ladyzhensky_Teslenko_ХНУРЭ_2007.pdf | 241,62 kB | Adobe PDF | View/Open |
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