Please use this identifier to cite or link to this item:
https://ea.donntu.edu.ua/jspui/handle/123456789/24444
Title: | Implementing control units for linear algorithms |
Authors: | Barkalov, A.A. Titarenko, L.A. Miroshkin, A.N. |
Keywords: | compositional microprogram control unit FPGA LUT elements embedded memory blocks hardware reduction |
Issue Date: | 2012 |
Publisher: | Kharkov National University of Radioelectronics |
Series/Report no.: | Radioelectronics and Informatics;4 (49) |
Abstract: | Two methods are proposed for reducing the number of LUT elements in logic circuits of compositional microprogram control units with code sharing. The methods are based on usage of free resources of embedded memory blocks for representing the codes of the classes of pseudoequivalent operational linear chains. It allows reducing the number of LUTs in the block of microinstruction addressing. The example of application and results of investigations are given. |
URI: | http://ea.donntu.edu.ua/handle/123456789/24444 |
ISSN: | 1563-0064 |
Appears in Collections: | Наукові публікації кафедри комп'ютерної інженерії |
Files in This Item:
File | Description | Size | Format | |
---|---|---|---|---|
047_2013-R&I.pdf | 2,98 MB | Adobe PDF | View/Open |
Items in DSpace are protected by copyright, with all rights reserved, unless otherwise indicated.