Please use this identifier to cite or link to this item: http://ea.donntu.edu.ua:8080/jspui/handle/123456789/8685
Title: Hardware methods to increase of algorithms for distributed logic simulation
Authors: Ладыженский Ю.В.
Тесленко Г.А.
Keywords: distributed logic simualtion
hardware acceleration
Issue Date: May-2006
Publisher: Харьковский национальный университет радиоэлектроники
Citation: Ladyzhensky Y.V., Teslenko G.A. Hardware methods to increase of algorithms for distributed logic simulation. // Proceeding of IEEE East-West Design & Test Workshop (EWDTW’06). Sochi, September 15-19, 2006. 484p. –pp.385
Abstract: The subject of research is methods of hardware implementation of synchronization algorithms for a distributed logical simulation. The main idea is a creation of a structural model from a set of functional units. This provides equivalent mapping algorithms for a computational processes and data processing operations.
URI: http://ea.donntu.edu.ua/handle/123456789/8685
Appears in Collections:Публікації у збірниках праць конференцій

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