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dc.contributor.authorBarkalov, Alexandr A.-
dc.contributor.authorTitarenko, Larisa A.-
dc.contributor.authorLavrik, Alexandr S.-
dc.description.abstractThe method of hardware reduction is proposed oriented on control units and CPLD chips. The method is based on a wide fan-in of PAL macrocells allowing using more than one source of microinstruction address. The method of logical condition replacement is used for optimization of microinstruction addressing block. An example of proposed method application is given.en_US
dc.titleReduction of hardware amount for control unit with address transformeren_US
Appears in Collections:Наукові публікації кафедри комп'ютерної інженерії

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