Please use this identifier to cite or link to this item: http://ea.donntu.edu.ua:8080/jspui/handle/123456789/1450
Title: Distributed Fault Simulation and Genetic Test Generation of Digital Circuits
Authors: Ivanov, Dmitry
Skobtsov, Yurij
El-Khatib
Keywords: digital circuit
genetic algorithm
fault simulation
parallel simulation
multi-core processo
islands model
Issue Date: 2006
Publisher: Proceedings of IEEE East-West Design&Test Workshop (EWDT’06).
Citation: Skobtsov Y.A., El-Khatib, Ivanov D.E. Distributed Fault Simulation and Genetic Test Generation of Digital Circuits // Proceedings of IEEE East-West Design&Test Workshop (EWDT’06).- 2006: Sochi.- p.89-94.
Abstract: Fault simulation is on of the most highly compute-intensive task in the technical diagnostics. One of the ways to speed-up this process is a parallelization on the calculation cluster. In this paper a distributed algorithm for fault simulation of digital circuits is presented. It is based on the well-known «master-slave» approach in which one processor is nominating as a master and rules all calculation on the all slave’s processors. To reach the maximal utilization of the processors in the cluster it is used schema with static fault list partitioning.
URI: http://ea.donntu.edu.ua/handle/123456789/1450
Appears in Collections:Наукові статті кафедри автоматизованих систем управління

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