Please use this identifier to cite or link to this item: http://ea.donntu.edu.ua:8080/jspui/handle/123456789/22865
Title: УМЕНЬШЕНИЕ ЧИСЛА LUT-ЭЛЕМЕНТОВ В СХЕМЕ АВТОМАТА МИЛИ
Other Titles: Reduction in the Number of LUTs in Mealy Finite State Machine’s Logic Circuit
Зменшення кількості LUT-елементів у схемі автомата Мілі
Authors: Баркалов, А.А.
Мальчева, Р.В.
Баркалов, А.А.
Barkalov, A.A.
Malcheva, R.V.
Barkalov, A.A.
Бaркалов, О.О.
Мальчева, Р.В.
Баркалов, О.О.
Keywords: мікропрограмний автомат
PR-автомат
FPGA
LUT
EMB
синтез
finite-state-machine
PR-automaton
synthesis
микропрограммный автомат
Issue Date: 2013
Publisher: Донецький національний технічний університет
Citation: Наукові праці Донецького національного технічного університету. Серія: Обчислювальна техніка та автоматизація. Випуск 2 (25). - Донецьк, ДонНТУ, 2013. С - 168-174
Abstract: Предложен метод уменьшения аппаратурных затрат в схеме микропрограммного автомата Мили, ориентированный на технологию FPGA. Метод основан на использовании модели PR-автомата и реализации системы микроопераций на встроенных блоках памяти EMB. Такой подход позволяет уменьшить число LUT элементов в схеме автомата. Приведены условия применения предложенного метода.
Description: The model of Mealy finite state machine (FSM) is widely used for implementing the control units. Nowadays, the field – programmable gate arrays (FPGA) are applied for implementing complex digital systems. As a rule, the FPGAs include look-up table (LUT) elements and embedded memory blocks (EMB). One of the important problems connected with FSM design is the reduction of the number of LUTs in an FSM’s logic circuit. The solution of this problem allows decreasing the number of interconnections among the LUTs. In turn, it leads to increasing of the performance and decreasing of the power dissipation. Using EMBs instead of LUTs is one of the possible ways for solving this problem. In the case of Mealy FSM, the system of microoperations could be implemented with EMBs. But it leads to the encoding of collections of microoperations and using some resources of a chip for generating these additional variables. A method is proposed for reducing the hardware amount in logic circuit of Mealy FSM. The method targets the technology of FPGA. The method is based on using the model of PR-automaton and implementing the system of microoperations with embedded memory blocks. This approach allows reducing the number of LUTs in the FSM’s circuit. The conditions are shown for using the proposed method. The example of FSM synthesis is given with applying the proposed approach. The analysis of application of EMBs with the configuration 1Kx16 (bits) for implementing the system of microoperations for the standard benchmarks is done. An application of proposed method allows the average decrease for the number of LUTs up to 28%. The scientific novelty of the proposed method is reduced to adaptation of the design method for PRautomaton to the specifics of FPGAs. The practical meaning of the method is determined by reducing for the number of LUTs in an FSM logic circuit in comparison with known methods. The further direction of the research is connected with development of state assignment methods leading to decreasing of the number of LUTs in the circuit of LUTer.
URI: http://ea.donntu.edu.ua/handle/123456789/22865
ISSN: 2075-4272
Appears in Collections:Випуск 2 (25)'2013

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