Please use this identifier to cite or link to this item: https://ea.donntu.edu.ua/jspui/handle/123456789/18733
Title: Разделение схемы адресации в КМУУ с общей памятью
Authors: Баркалов, А.А.
Титаренко, Л.А.
Ефименко, К.Н.
Зеленёва, И.Я.
Keywords: CMCU
GSA
OLC
FPGA
logic circuit
Issue Date: 16-Apr-2013
Publisher: Донецкий национальный технический университет
Series/Report no.: Практика и перспективы развития партнерства в сфере высшей школы;2
Abstract: A method for reducing the hardware amount in the circuit of CMCU with common memory is proposed oriented on FPGA technology. The method is based on the use of three sources of codes classes of pseudoequivalent OLC and a multiplexer to choose one of these sources. Such an approach would reduce the number of LUT elements in the addressing circuit of CMCU. An example of the proposed method application is given.
URI: http://ea.donntu.edu.ua/handle/123456789/18733
Appears in Collections:Наукові публікації кафедри комп'ютерної інженерії



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